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BREAKING

The world’s first 16-layer HBM3E chips to be launched in 2025

FILE PHOTO: FILE PHOTO: Illustration picture of semiconductor chips
FILE PHOTO: Semiconductor chips are seen on a printed circuit board in this illustration picture taken February 17, 2023. REUTERS/Florence Lo/Illustration/File Photo
Source: REUTERS

The world's top chip producer, SK Hynix, has announced a groundbreaking development in the semiconductor industry with the introduction of the world’s first 16-layer High Bandwidth Memory (HBM3E) chips.

This innovation marks a significant leap in-memory technology, promising enhanced performance and capacity for high-demand applications such as artificial intelligence (AI) and high-performance computing.

This was announced by SK Hynix CEO Kwak Noh-jung during the SK AI Summit in Seoul on Monday, November 4.

The new 16-layer HBM3E chips, which boast a 48-gigabyte capacity, are set to begin mass production in early 2025.

"The market for 16-high HBM is expected to open up from the next-generation HBM4," Kwak said at the SK AI Summit in Seoul. "SK Hynix has been developing 48GB 16-high HBM3E in a bid to secure technological stability and plans to provide samples to customers early next year."

This development follows the company's successful launch of 12-layer HBM3E products this year.

The 16-layer HBM3E chips are designed to deliver significant performance improvements. Compared to their 12-layer predecessors, the new chips offer an 18% increase in training performance and a 32% boost in inference performance.

These enhancements are crucial for AI applications, where processing speed and efficiency are paramount.

Speaking at the AI Summit hosted by the SK Group, Chairman Chey Tae-won shared that "Korea has already played a leading role in entering the Internet era. If Korea is to continue to play that role in the AI era, it will be necessary to invest in our AI infrastructure, build large-scale AI data centres and secure data, and then cultivate talent suitable for the AI era."

SK Hynix also plans to utilise advanced manufacturing techniques, including the mass reflow-molded underfill (MR-MUF) process, to ensure the reliability and performance of the new chips.

This process, first implemented with HBM2E in 2019, has been refined to support the increased complexity of the 16-layer design.

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